Method of Operations for ARQ ARQ Related IEs defined in 802.16e specification ARQ Support TLV ARQ ACK Type TLV ARQ Enable TLV ARQ WINDOW SIZE ARQ RETRY TIMEOUT ARQ BLOCK LIFETIME ARQ SYNC LOSS TIMEOUT ARQ DELIVER IN ORDER ARQ RX PURGE TIMEOUT ARQ BLOCK SIZE ARQ Feedback ACK Mechanism Selective ACK Cumulative ACK Cumulative with selective ACK Cumulative ACK with Block Sequence ACK ARQ High Level Design ARQ BLOCK Finite State Machine in ARE ARQ BLOCK Finite State Machine in ATE ARQ Control Message ARQ Feedback Message ARQ Discard Message ARQ Reset Message

Method of Operations for ARQ

ARQ is the error control mechanism for the data transmission. In 802.16e specification, ARQ mechanism is optional. When implemented, ARQ may be enabled on a per connection basis. The per connection parameters of ARQ are specified and negotiated during DSA procedure. Specific instant of ARQ is limited to one unidirectional connection.

A MAC SDU is logically partitioned into blocks and frame these blocks into the MAC PDUs.

Figure 1 ARQ Receiver and Transmitter.

ARQ operation can be divided into two logical entities i.e. ARQ Receiving Entity (ARE) and ARQ Transmitting Entity (ATE). ARQ Receiving Entity (ARE) receives the MAC PDUS from lower layers and prepares the MAC SDU, which is delivered to upper layer. ARQ Transmitting Entity (ATE) receives the MAC SDU from upper layer and prepares the MAC PDUs, which is delivered to the lower layers. ARE is responsible to send the acknowledgements of the received PDUs.

Each MAC PDU is identified by unique identity and ARE sends the ACK / NACK over this identity. In 802.16e, this identity is knows as Block Sequence Number (BSN). Each MAC PDU is identified BSN and ARE sends the ACK or NACK based on this BSN.

Figure 2 ARQ enabled MAC PDUs and their ACK.

Figure 3 shows that position of ARQ entities in MS and BS. MS and BS both contain the ARQ receiving entity (ARE) and ARQ transmitting entity (ATE) for one transport connection.

Figure 3 Position of ARE and ATE in MS and BS.

ARQ Related IEs defined in 802.16e specification

ARQ Support TLV

Since ARQ mechanism is optional in 802.16e specification, there is ARQ Support TLV of type 10 is defined in REG-REQ/RSP message. This field indicates the availability of SS support for the ARQ.

ARQ ACK Type TLV

The value of this parameter specifies the ARQ ACK type supported by the MS. MS shall transmit this parameter if ARQ is supported.

Bit 0 Selective ACK entry

Bit 1 Cumulative ACK entry

Bit 2 Cumulative with Selective ACK entry

Bit 3 Cumulative ACK with Block Sequence ACK

Bits 4-7 reserved

ARQ Enable TLV

This TLV indicates whether or not ARQ use is requested for the connection that is being setup. A value of 0 indicates that ARQ is not requested and a value of 1 indicates that ARQ is requested. The DSA-REQ shall contain the request to use ARQ or not. The DSA-RSP message shall contain the acceptance or rejection of the request. ARQ shall be enabled for this connection only if both sides report this TLV to be non-zero. The SS shall either reject the connection or accept the connection with ARQ.

ARQ WINDOW SIZE

This parameter is negotiated upon connection setup or during operation. The DSA-REQ/DSC-REQ message shall contain the suggested value for this parameter. The DSA-RSP/DSC-RSP message shall contain the confirmation value or an alternate value for this parameter. The smaller of the two shall be used as the ARQ_WINDOW_SIZE.

ARQ RETRY TIMEOUT

ARQ RETRY TIMEOUT is the minimum time interval a transmitter shall wait before retransmission of an unacknowledged block for retransmission. The interval begins when the ARQ block was last transmitted. On connections that use both HARQ and ARQ, the ARQ_RETRY_TIMEOUT value shall be set accordingly to allow HARQ retransmission operation of the ARQ block to be completed before ARQ retransmission occurs. An ARQ block is unacknowledged if it has been transmitted but no acknowledgment has been received.

The ARQ_retry_timeout should account for the transmitter and receiver processing delays and any other delays relevant to the system.

TRANSMITTER_DELAY: This is the total transmitter delay, including sending (e.g., MAC PDUs) and receiving (e.g., ARQ feedback) delays and other implementation dependent processing delays. If the transmitter is the BS, it may include other delays such as scheduling and propagation delay.

RECEIVER_DELAY: This is the total receiver delay, including receiving (e.g., MAC PDUs) and sending (e.g., ARQ feedback) delays and other implementation-dependent processing delays. If the receiver is the BS, it may include other delays such as scheduling and propagation delay.

The DSA-REQ and DSA-RSP messages shall contain the values for these parameters, where the receiver and transmitter each declare their capabilities. When the DSA handshake is completed, each party shall calculate ARQ_RETRY_TIMEOUT to be the sum of TRANSMITTER_DELAY and RECEIVER_DELAY

ARQ BLOCK LIFETIME

The DSA-REQ message shall contain the value of this parameter as defined by the parent service flow. If this parameter is set to 0, then the ARQ_BLOCK_LIFETIME value shall be considered infinite. Values from 1–6553500 are supported with 100 μs granularity

ARQ SYNC LOSS TIMEOUT

The BS shall set this parameter. The DSA-REQ or DSA-RSP messages shall contain the value of this parameter as set by the BS. If this parameter is set to 0, then the ARQ_SYNC_LOSS_TIMEOUT value shall be considered infinite. Values from 1–6553500 are supported in units of 100 &931;s

ARQ DELIVER IN ORDER

The DSA-REQ message shall contain the value of this parameter. This TLV indicates whether or not data is to be delivered by the receiving MAC to its client application in the order in which the data was handed off to the originating MAC.

ARQ RX PURGE TIMEOUT

The DSA-REQ message shall contain the value of this parameter as defined by the parent service flow. If this parameter is set to 0, then the ARQ_RX_PURGE_TIMEOUT value shall be considered infinite.

ARQ BLOCK SIZE

This value of this parameter specifies the size of an ARQ block. The requester includes its desired minimum and maximum setting in the DSA-REQ/REG-REQ message. The receiver of the DSA-REQ/REG-REQ message shall select the value it prefers with in the range of the two values, inclusive, in the DSA-REQ/REG-REQ message. This selected value is included in selected block size of the DSA-RSP/REG-RSP message

Bit 0-3: encoding for proposed minimum block size (M)

Bit 4-7: encoding for proposed maximum block size (N) where the minimum block size is equal to 2^(M+4) and the maximum block size is equal to 2^(N+4), M≤6, N≤6, and M≤Ν

For DSA-RSP and REG-RSP:

Bit 0-3: encoding for selected block size (P)

Bit 4-7: set to 0
where the selected block size is equal to 2^(P+4),P≤6 and M≤P≤N

ARQ Feedback ACK Mechanism

802.16e standard defines four type of ARQ ACK Mechanism

- Selective ACK

- Cumulative ACK

- Cumulative with selective ACK

- Cumulative ACK with Block Sequence ACK

ARQ Feedback message is sent to indicate ACK and NACK from the ARE. ARQ Feedback message contains ARQ Feedback IE, which is having different encoding in case of different ACK Type. ARQ Feedback message can not be fragmented and can be sent as a standalone MAC management message on the basic connection or piggybacked on the existing connection.

Selective ACK

It is not the part of Wimax profile i.e. that’s we skip it here.

Cumulative ACK

Figure 4 shows ARQ Feedback IE in case of cumulative ACK. BSN value indicates that its corresponding block and all blocks with lesser values with in the transmission window have been successfully received.

Figure 4 ARQ Feedback IE in case of Cumulative BSN ACK TYPE

Cumulative with selective ACK

Figure 5 shows ARQ Feedback IE in case of cumulative with selective ACK. In sequence map each bit set to one indicates the corresponding ARQ block has been received without errors. The bit corresponding to the BSN value in the IE, is the most significant bit of the first map entry. The bits for succeeding block numbers are assigned left-to-right (MSB to LSB) within the map entry. If the ACK Type is 0x2, then the most significant bit of the first map entry shall be set to one and the IE shall be interpreted as a cumulative ACK for the BSN value in the IE. The rest of the bitmap shall be interpreted similar to ACK Type 0x0.

Figure 5 ARQ Feedback ACK IE with cumulative with selective ACK

Cumulative ACK with Block Sequence ACK

Figure 6 and 7 shows ARQ Feedback IE in case of cumulative ACK with block sequence ACK. In sequence map, each bit set to one indicates the corresponding block sequence has been received without error. The MSB of the field corresponds to the first sequence length field in the descriptor. The bits for succeeding length fields are assigned left-to-right within the map entry. Since the block sequence described by the first descriptor of the first map entry of the IE corresponds to the sequence of blocks immediately after the Cumulative ACK, the ACK map bit for this sequence shall be zero indicating this sequence has not yet been received.

The BSN of the first block of the block sequence described by the first descriptor of the first IE map entry is the value of the Cumulative ACK plus one. The BSN of the first block of each block sequence is determined by adding the BSN of the first block of the previous block sequence to the length of that sequence. Within a map entry, Sequence Map/Length ordering follows the rule specified in the definition of Sequence ACK Map. Across map entries, ordering moves from the first

map entry (i = 0) to the last map entry (i = Number of ACK Maps).

Figure 6 ARQ Feedback ACK IE with cumulative ACK with Block sequence ACK with Sequence Format with 2 block sequence of 6 bytes

Figure 7 ARQ Feedback ACK IE with cumulative ACK with Block sequence ACK with Sequence Format with 3 block sequence of 4 bytes

ARQ High Level Design

Figure 9 ARQ Functional Block

ARQ Functionality can be divided into three logical blocks.

1. ARQ Control Unit: - ARQ Control unit, handles the ARQ Control messages like ARQ Discard Message and ARQ Reset Message. ARQ Control unit receives the ARQ Control Message from the ARQ Receiving Entity. ARQ Control unit also commands ARQ Transmitting entity to transmit ARQ Control Messages.
2. ARQ Receiving Entity: - ARQ Receiving Entity does the following functions.
1. ARE receives the MAC PDUs from lower layer and extract the ARQ Blocks.
2. ARE reassembly the ARQ Blocks and prepares the MAC SDU for Upper layer.
3. ARE generates the ACK for the received ARQ block and pass it to ATE to send.
4. ARE generates the NACK for the not received ARQ block and pass it to ATE to send.
5. ARE decides the type of ARQ Feedback ACK to be sent.
6. ARE manages RX WINDOW to accept or reject the ARQ blocks.
7. ARE acts on the control message received from the ARQ Control Unit.
8. ARE manages in order delivering, if configured.
9. ARE manages Rx purge timeout.
10. ARE manages sync loss time.
3. ARQ Transmitting Entity: - ARQ Transmitting Entity does the following functions.
1. ATE segments the MAC SDU and prepares the ARQ Block
2. ATE performs fragmentation and packing over the ARQ Block.
3. ATE manages the Retransmission queue for the retransmission of the ARQ Block which has received NACK.
4. ATE manages to schedule between the ARQ Control Message, ARQ Feedback Message, fresh MAC PDU containing ARQ Blocks, retransmitted MAC PDU containing ARQ Blocks,
5. ATE acts on the control message received from the ARQ Control Unit.
6. ATE manages sync loss time
7. ATE manages block life time in the retransmission queue.

ARQ BLOCK Finite State Machine in ARE

ARQ Block State in ARE

1. Arrival: - This is the initial state of ARQ BLOCK, when ARQ Block is received at ARE.
2. Wait_For_Reassembly:- This state indicates that current ARQ Block is waiting for other ARQ Block for reassembly. After reassembly is completed, it is delivered to upper layer.
3. Discarded and Done:- This state indicates that ARQ Block is discarded and deleted from ARE.

ARQ Block Events in ARE

1. Not_Complete_Fragment:- This event indicates that ARQ Block received with fragmentation “on” connection and wait for the other ARQ Block for reassembly.
2. ARQ_PURGE_TIMEOUT:- This event indicates that ARQ purge timeout is happened.
3. Not_In_BSN_Range: this event is generated when BSN is out of range with respect to RX WINDOW.
4. Delivered:- This event indicates that ARQ Block is delivered to Upper layer.

FSM Table for ARQ Block in ARE

State/Events	Arrival	Wait for reassembly	Discarded and Done
Not Complete Fragment	Wait for reassembly
Arq Purge Timeout		Discarded and done
Not in BSN range	Discarded and done
Delivered		Discarded and done

ARQ BLOCK Finite State Machine in ATE

ARQ Block State in ATE

1. Not Sent: - This state is the initial state of ARQ BLOCK, when it is created from MAC SDU.
2. Outstanding: - This state in when ARQ BLOCK is schedule to transmit and given to PHY layer for transmission.
3. Discarded: This state indicates the ARQ BLOCK is discarded for some reason.
4. Waiting for the Retransmission: This state indicates that ARQ BLOCK will be retransmitted over the air interface.
5. Done: ARQ Block is transmitted to the other end successfully.

ARQ Block Events in ATE

1. Transmit: This event indicates that ARQ BLOCK is schedule for the transmission.
2. ACK: This event indicates the ACK is received from the peer ARE entity.
3. ARQ_BLOCK_LIFETIME_EXPIRY: This event indicates the ARQ BLOCK LIFE TIMER is expired.
4. ARQ_RETRY_TIMEOUT: This event indicates that the ARQ RETRY TIMER is expired.
5. NACK: This event indicates the ACK is received from the peer ARE entity
6. Retransmit: This event indicates the ARQ BLOCK is re transmitted over the air interface.

FSM Table for ARQ Block in ATE

State/Events	Not Sent	OutStanding	Discarded	Waiting For Retransmission	Done
Transmit	Out standing
ACK		Done	Done
NACK		Waiting For Retransmission		Done
ARQ BLOCK LIFE TIMER EXPIRY		Discarded		Discarded
ARQ RETRY TIMEOUT		Waiting For Retransmission
Retransmit				Outstanding

ARQ Control Message

ARQ Feedback Message

ARQ Feedback Message format

1. Management message Type (33) - 8 bits
2. ARQ Feedback IE -Variable

ARQ Discard Message

ARQ Discard Message format

1. Management message Type (34) – 8 bits
2. Connection ID - 16 bits
3. Reserved - 5 bits
4. BSN - 11 bits

A Discard message shall be sent following violation of ARQ_BLOCK_LIFETIME. The message may be sent immediately or may be delayed up to ARQ_RX_PURGE_TIMEOUT + ARQ_RETRY_TIMEOUT. Following the first transmission, subsequent discard orders shall be sent to the receiver at intervals of ARQ_RETRY_TIMEOUT until an acknowledgment to the discarded BSN has been received. Discard orders for adjacent BSN values may be accumulated in a single Discard message.

ARQ Reset Message

ARQ Reset Message format

1. Management message Type (35) - 8 bits
2. Connection ID - 16 bits
3. Type - 2 bits
4. Direction - 2 bits
5. Reserved - 6 bits

Direction Values:

0b00 = Uplink or downlink

0b01 = Uplink

0b10 = Downlink

0b11 = Reserved

Type Values:

0b00 = Original message from Initiator

0b01 = Acknowledgment from Responder

0b10 = Confirmation from Initiator

0b11 = Reserved

For transport CIDs, the Direction bits shall be set to 0b00 on transmission, and ignored on reception. For secondary management CIDs, the Direction bits shall be set to 0b01 or 0b10 as appropriate and other values shall cause the message to be treated as invalid and discarded on reception.

The message is used in a dialog to reset the parent connection’s ARQ transmitter and receiver state machines. The ARQ Reset message shall be sent as a MAC management message on the basic management connection of the appropriate direction.

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